A demonstration of the PCIe 7.0 interface was made at the PCI-SIG DevCon 2024 event last week, providing visitors at the forum with a test of the soon-to-launch connection and the sort of speeds we can expect. That speed, by the way, was rated at 128GT/s.
For context, that speed is four times the maximum transfer rate of the current PCIe 5.0 interface, which is 32GT/s. Even more ironic is the fact that, despite having already being in the market for a couple of years, it’s still not fully utilised. Note, that we said utilised, and not implemented, because virtually every PC and laptop produced in that timeline support it in one form or another but, again, the interface isn’t necessarily used to its full potential.
The demonstration was reportedly made over a period of two days without any interruptions with Cadence software. In technical terms, Cadence, with PCIew 7.0 maintain a pre-FEC Ber of ~3E-8. As an alternative to CopprLink.
As a quick refresher, CopprLink was announced by PCI-SIG back in November last year, with its specs debuting earlier in March this year. The specs of the connection are designed to facilitate 32GT/s or 64GT/s connections for PCIe 5.0 and 6.0, respectively. Those transfer speeds are already blazing in comparison to PCIe 4.0, but PCIe 7.0 is both clearly and obviously blistering in its application.
On that note, don’t expect PCIe 7.0 to be hitting the consumer circuit anytime in the near and immediate future. Interface and applications like this are likely to see rollout for industrial-level outfits, including companies that run datacentres, hyperscale, cloud computing, High Performance Computing (HPC), and of course, AI machines on LLM and MML.
