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Samsung And IBM Reveal Vertically Stacked Transistor Design For High-Efficiency Chips

It's estimated that processors will either double in speed or use 85% less energy.

by Ikmal Rozlan
December 13, 2021
Samsung ibm transistor

[Photo: Samsung/IBM]

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Samsung and IBM have announced a breakthrough in their research on semiconductors that could extend the Moore’s law limit of semiconductor design. Current chips use FinFET transistors where the transistors lie flat on the surface of the silicon with electricity flowing side-by-side, but the new Vertical Transport Field Effect Transistors (VTFET) sit perpendicular to one another and current flows vertically.

Moore’s law states that the number of transistors on a chip will double every two years, but because there is a physical limit on how many can be fit onto the chip. Experts predict that the time will eventually come where the rate of progress will slow down and the observation will no longer apply.

cpu transistor semiconductor
[Photo: TobiasD/Pixabay]

The two tech giants claim the advantage of VTFET is that it will extend the limit beyond IBM’s current nanosheet technology. IBM’s latest chip design, unveiled earlier this year, uses 2nm technology and will fit up to 50 billion transistors.

Samsung and IBM estimate that VTFET will lead to processors either doubling in speed or use 85% less energy. The companies claim that the design could one day lead to phones that could last a whole week, though they did not mention when this new technology would be commercially available. It is also worth pointing out that the two companies are not the only ones working on this technology though, as Intel has recently revealed that they’re also working on stacked chips.

(Source: Engadget)

Related Article Samsung May Have Two Galaxy S27 Ultra Sizes Next Year
Filed Under IBMprocessorSamsungSemiconductor
Updated 10:29 am, Tue, 14 December 21
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