IBM’s research team has managed to create the world’s first 5nm based chip. The significance of this is not so much that the group has managed to shrink the die size, but that it achieved the feat without the use of FinFET manufacturing techniques.
Working with its partners, Samsung and GlobalFoundries, IBM squeezed some 30 million transistors into a space the size of a fingernail. That is 10 million more transistors than the current existing 7nm manufacturing process.
This was done with using gate all-around transistors, which are the next evolution in the triple gate FinFET transistors. It also used true 3D transistor stacking. Current techniques use vertical silicon fins as channels for electrons to travel. Which has problems with scaling as more transistors are added to the chip. IBM’s method instead lays the fin flat, allowing them to be layered more efficiently.
Extreme ultraviolet lithography was also used to etch the channels in the silicon. This method allows for fewer steps in the manufacturing process compared to the current immersion lithrography methods. Essentially, the wavelength of the beam is smaller and therefore requires fewer passes in order to achieve the same results.
What all this translates into is a chip that is 40 percent more power efficient than existing designs, or 75 percent more powerful at the same power levels. At least when compared to the existing 10nm chips produced by Samsung.
That said, we’re not going to be seeing these 5nm chip for the next couple of years. Producing them will require manufacturers to overhaul their factories, which is something that is unlikely to happen. Especially when these same companies are still struggling with getting 7nm chips to market.